1. Field of the Invention
The present invention relates to a wiring board such as a tape carrier substrate including a flexible insulating base with conductive wirings arranged thereon, on each of which a bump electrode for connection with a semiconductor chip is formed. The present invention also relates to a semiconductor device using the wiring board.
2. Description of Related Art
A package module using a tape carrier substrate is known as a Chip On Film (COF), for example. The main constituents of a tape carrier substrate include a flexible insulating film base and a large number of conductive wirings formed on the film base. A COF is manufactured by mounting a semiconductor chip on such a tape carrier substrate and connecting electrode pads of the semiconductor chip with the conductive wirings to package the semiconductor chip.
JP2004-327936 A describes a configuration of bump electrodes being formed at a region of end portions, i.e., at inner leads of conductive wirings on a tape carrier substrate where a semiconductor chip is to be mounted. The connection of the conductive wirings of the tape carrier substrate with electrode pads of the semiconductor chip via bump electrodes can enhance the connection reliability for the semiconductor chip packaging. In general, polyimide is used as the film base, and copper is used as the conductive wirings and the bump electrodes. A metal plated coating optionally is formed at a predetermined area of the conductive wirings.
The COF mainly is used for packaging of a driver for driving a display panel such as a liquid crystal panel. FIG. 5 shows an exemplary tape carrier substrate used for the packaging of a driver for driving a display panel. FIG. 6 is a cross-sectional view of this tape carrier substrate on which a semiconductor chip is packaged.
In FIG. 5, reference numeral 1 denotes a flexible insulating base. A semiconductor chip 2 and electrode pads 3 provided for the semiconductor chip 2 are shown with broken lines. At a region on the insulating base 1 where the semiconductor chip 2 is to be mounted, inner leads 4a to 4d are disposed. The inner leads 4a to 4d are a part of conductive wirings provided on the insulating base 1, and the other ends of the inner leads form external terminals (not illustrated). At end portions of the inner leads 4a to 4d, bump electrodes 5 are provided respectively. As shown in FIG. 6, the bump electrodes 5 are disposed so as to face the electrode pads 3 of the semiconductor chip 2 respectively, and the electrode pads 3 and the inner leads 4a to 4d are connected via the bump electrodes 5. A bonding portion of the inner leads 4a to 4d and the semiconductor chip 2 is sealed with a protective resin 14.
In general, in the case where such a tape carrier substrate, which is for making up a dual in-line package in two ways of input and output, is used for example as a driver for driving a display panel, the number of input terminals is much different from the number of output terminals. In FIG. 5, the inner leads 4a and 4b are on the output side, and the inner leads 4c and 4d are on the input side. For instance, there are 60 to 80 terminals on the input side, whereas there are 400 to 800 terminals aligned on the output side.
When the semiconductor chip 2 is packaged on this tape carrier substrate, as shown in FIG. 7, after the tape carrier substrate is placed on a bonding stage 10 and the semiconductor chip 2 is held with a bonding tool 11, face-down bonding is conducted. Pressure and heat (about 250° C.) are applied by the bonding tool 11 while ultrasonic vibration is applied in the direction of the arrow X, whereby the bump electrodes 5 and the electrode pads of the semiconductor chip 2 are bonded.
When a semiconductor chip is packaged on a tape carrier substrate by face-down bonding as described above, stress will be concentrated at the interface between the inner leads and the bump electrodes, as pressure, heat and ultrasonic wave are applied thereto. Therefore, a break tends to occur in the inner leads. Such stress particularly tends to be concentrated at the interface between an inner lead and a bump electrode when the inner lead is located at an end portion of the semiconductor chip or the inner leads are arranged sparsely, thus increasing the tendency of a break in the inner leads.
The inner leads in FIG. 5 can be divided into the inner leads 4a at a center portion 12a on the output side, the inner leads 4b at an end portion 12b on the output side, the inner leads 4c at a center portion 13a on the input side and the inner leads 4d at an end portion 13b on the input side.
A wiring density is higher at the center portion 12a on the output side, where the inner leads 4a are arranged with a uniform pitch. The inner leads 4b at the end portion 12b on the output side and the inner leads 4d at the end portion 13b on the input side are formed thicker than the inner leads 4a. This is because the inner leads located at an end portion of the semiconductor chip tend to have stress concentrated on the interface between the inner leads and the bump electrodes, and therefore they are made thicker for suppressing a break in the inner leads.
Since the electrode pads of the semiconductor chip are arranged sparsely at the center portion 13a on the input side as described above, the wiring density of the corresponding inner leads 4c accordingly is low, and therefore the inner leads 4c are not arranged uniformly. Thus, there is a conspicuous tendency toward breaking of inner leads at a portion of the inner leads arranged sparsely, because stress is concentrated when pressure, temperature and ultrasonic vibration are applied for packaging the semiconductor chip on the tape carrier substrate.